NUMA effects and NVMe

Guided Research


Modern SSDs use the NVMe protocol for communication. To achieve very low access latencies, state-of-the-art storage engines like SPDK [1] bypass the OS kernel and access SSDs directly. However, on systems with multiple CPUs, memory may not be organized centrally (as shared memory providing uniform memory access to all threads) but in a distributed manner with CPU-local memory. On such systems, access latencies vary depending on whether the accessed data belongs to the memory of the CPU the SSD is attached to or memory of another CPU in the system, i.e., we have non-uniform memory accesses (NUMA).

The aim of this guided research is to investigate the effects of data placement on NUMA architectures for high-speed NVMe I/O.

Research questions

  1. What effects on throughput and latency can be observed with varying data placement?
  2. What conclusions can be drawn for data placement of database systems?


  • Knowledge of a systems programming language (C, C++, Rust, …)


If you are interested in this topic, send me an e-mail or drop by my office.


  1. Storage Performance Development Kit